Liquid crystal display and method thereof

ABSTRACT

A liquid crystal display includes a first panel, a second panel facing and separated from the first panel, a liquid crystal layer interposed between the first and second panels, a plurality of sensor data lines formed on the second panel, a plurality of variable capacitors of which capacitance thereof is varied by pressure, the variable capacitors connected to the sensor data lines, a plurality of reference capacitors connected to the sensor data lines, and first reset transistors and second reset transistors connected to the sensor data lines and supplying a first reset voltage and a second reset voltage to the sensor data lines at different times, respectively.

The present application claims priority to Korean Patent Application No.10-2005-0101378, filed on Oct. 26, 2005, and all the benefits accruingtherefrom under 35 U.S.C. §119, and the contents of which in itsentirety are herein incorporated by reference.

BACKGROUND OF THE INVENTION

(a) Field of the Invention

The present invention relates generally to a liquid crystal display(“LCD”) and a method thereof. More particularly, the present inventionrelates to an LCD having sensing units detecting touch position and amethod of detecting touch position using the sensing units.

(b) Description of the Related Art

Liquid crystal displays (“LCDs”) typically include a pair of panels thatare provided with pixel electrodes and a common electrode, as well as aliquid crystal layer with dielectric anisotropy interposed between thetwo panels. The pixel electrodes are typically arranged in a matrixpattern and are connected to switching elements, such as thin filmtransistors (“TFTs”), such that they receive image data voltages row byrow. The common electrode covers the entire surface of one of the twopanels and is supplied with a common voltage. A pixel electrode andcorresponding portions of the common electrode and correspondingportions of the liquid crystal layer form a liquid crystal capacitorthat, along with a switching element connected thereto, is a basicelement of a pixel.

An LCD generates electric fields by applying voltages to the pixelelectrodes and the common electrode, and the strength of the electricfields applied thereto are varied in order to adjust the transmittanceof light passing through the liquid crystal layer, thereby displayingimages.

Touch screen panels write or draw letters or pictures by touching afinger, a touch pen, or a stylus to a display panel or carry out desiredoperations of machines such as computers, etc., by operating icons. LCDsattached to the touch screen panels determine whether touch is made withthe display panel (e.g., via a finger, the touch pen, etc.) and, if so,a corresponding touch position. While these panels provide certainadvantages, the manufacturing costs of the LCDs that incorporate touchscreen panels are high compared to the costs of LCDs that do not employtouch screen panels. Furthermore, the process used in attaching thetouch screen panel to the LCD causes a reduction in the yield and theluminance of the LCD, as well as an increase in the thickness of theLCD.

For solving the above problems, a plurality of photo sensing units,which are implemented with thin film transistors, may be integrated intopixels displaying images of the LCD. The photo sensing unit senses thevariation of light incident upon the display panel by a touch of thefinger or an implement of a user, to determine whether there has beentouch with the display panel and a touch position.

However, these photo sensing units are influenced by characteristicssuch as intensity of external light, intensity of light from a backlight unit included in the LCD, and temperature, thereby resulting in adecrease in the accuracy of a corresponding sensing operation.

BRIEF SUMMARY OF THE INVENTION

The present invention solves the problems of the conventional techniquesdescribed above.

In exemplary embodiments of the preset invention, a liquid crystaldisplay (“LCD”) includes a first panel, a second panel facing andseparated from the first panel, a liquid crystal layer interposedbetween the first and second panels, a plurality of sensor data linesformed on the second panel, a plurality of variable capacitors of whichcapacitance thereof is varied by pressure, the variable capacitorsconnected to the sensor data lines, a plurality of reference capacitorsconnected to the sensor data lines, and first reset transistors andsecond reset transistors connected to the sensor data lines andsupplying a first reset voltage and a second reset voltage to the sensordata lines at different times, respectively.

The LCD may further include a plurality of output transistors connectedto the sensor data lines and generating output signals based on sensordata signals flowing through the sensor data lines. The outputtransistors may be disposed on a periphery area of the second panel.

The LCD may further include a sensing signal processor supplied with theoutput signals from the output transistors and generating sensingsignals based on the output signals. The sensing signal processor mayfurther include integrators integrating the output signals to generatethe sensing signals. The integrators may include amplifiers andcapacitors.

The LCD may further include current sources connected to the outputtransistors and the sensing signal processor, and the current sourceseach flowing a constant current. The current sources may include thinfilm transistors (“TFTs”) flowing the constant current while the sensingsignal processor generates the sensing signals.

The first reset transistors may apply the first reset voltage to thesensor data lines before the sensing signal processor generates thesensing signals. The second reset transistors may apply the second resetvoltage to the sensor data lines after the sensing signal processorgenerates the sensing signals. The first reset transistors and thesecond reset transistors may be formed on a periphery area of the secondpanel.

The variable capacitors may include first capacitance electrodes formedon the first panel and second capacitance electrodes formed on thesecond panel, and the sensor data lines function as the secondcapacitance electrodes. A distance between the first capacitanceelectrode and the second capacitance electrode for each variablecapacitor may be varied by pressure and the capacitance of each variablecapacitor may be varied based on a distance variation.

The reference capacitors may be supplied with a reference voltage. Thefirst capacitance electrodes may be supplied with a common voltageswinging between a first level and a second level.

The sensing signal processor may generate the sensing signals in a porchperiod between frames. The sensing signal processor may generate thesensing signals within a predetermined time after the first resettransistors are turned off. The common voltage may maintain one of thefirst level and the second level for the predetermined time. Thepredetermined time may be at least about 1H.

The sensor data lines may include a plurality of first and second sensordata lines extending in directions different from each other,respectively.

In other exemplary embodiments of the preset invention, an LCD includesa first panel, a second panel facing and separated from the first panel,a liquid crystal layer interposed between the first and second panels, aplurality of sensor data lines formed on the second panel, a pluralityof variable capacitors of which capacitance thereof is varied bypressure, the variable capacitors connected to the sensor data lines, aplurality of reference capacitors connected to the sensor data lines, aplurality of output transistors connected to the sensor data lines andgenerating output signals based on sensor data signals flowing throughthe sensor data lines, and a plurality of current sources connected tothe output transistors and flowing a constant current.

The LCD may further include a sensing signal processor connected to theoutput transistors and the current sources and generating sensingsignals based on the output signals and the constant current. Thecurrent sources may include TFTs flowing the constant current while thesensing signal processor generates the sensing signals.

The LCD may further include reset transistors connected to the sensordata lines and applying a reset signal to the sensor data lines. Atleast one of the output transistors, the TFTs, and the reset transistorsmay be formed in a periphery area of the second panel.

In other exemplary embodiments of the present invention, a method ofprocessing a sensing signal based on a pressure applied to a point of aliquid crystal panel, the liquid crystal panel including a first panelreceiving a common voltage and a second panel having a plurality ofsensor lines, includes applying a gate-on voltage of a reset signal toone of the sensor lines during a period when the common voltage has afirst level, applying a switching signal to a switch of a sensing signalprocessor when a gate-off voltage of the reset signal is applied to theone of the sensor lines and during a period when the common voltage hasa second level, and reading a sensing signal from an integrator in thesensing signal processor before the common voltage returns to the firstlevel.

In other exemplary embodiments of the preset invention, an LCD includesa first panel, a second panel facing and separated from the first panel,a liquid crystal layer interposed between the first and second panels, asensor data line formed on the second panel, a switch including a commonelectrode of the first panel and the sensor data line of the secondpanel as two terminals, a reset transistor connected to a first end ofthe sensor data line and supplying a reset voltage to the sensor dataline, an output transistor connected to a second end of the sensor dataline and generating an output signal based on a sensor data signalflowing through the sensor data line, and a sensing signal processorconnected to the output transistor and generating a sensing signal basedon the output signal.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will become more apparent by further describingexemplary embodiments thereof with reference to the accompanyingdrawings, in which:

FIG. 1 is a block diagram of an exemplary LCD showing pixels accordingto an exemplary embodiment of the present invention;

FIG. 2 is an equivalent circuit diagram of an exemplary pixel of anexemplary LCD according to an exemplary embodiment of the presentinvention;

FIG. 3 is a block diagram of an exemplary LCD showing exemplary sensingunits according to an exemplary embodiment of the present invention;

FIGS. 4A and 4B are equivalent circuit diagrams of exemplary sensingunits of exemplary LCDs according to exemplary embodiments of thepresent invention, respectively;

FIG. 5 is a schematic diagram of an exemplary LCD according to anexemplary embodiment of the present invention;

FIG. 6A is an equivalent circuit diagram of a plurality of exemplarysensing units connected to one exemplary sensor data line in anexemplary LCD according to an exemplary embodiment of the presentinvention;

FIG. 6B is an equivalent circuit diagram simply representing theequivalent circuit diagram shown FIG. 6A;

FIGS. 7A and 7B are timing charts for an exemplary sensing operation ofan exemplary LCD according to an exemplary embodiment of the presentinvention;

FIG. 8 is an equivalent circuit diagram illustrating an exemplaryconnection between the exemplary sensor data lines and an exemplarysensing signal processor of an exemplary LCD according to an exemplaryembodiment of the present invention;

FIG. 9A is an equivalent circuit diagram of a plurality of exemplarysensing units connected to one exemplary sensor data line in anexemplary LCD according to another exemplary embodiment of the presentinvention;

FIG. 9B is an equivalent circuit diagram simply representing theequivalent circuit diagram shown FIG. 9A; and

FIG. 10 is a timing chart for an exemplary sensing operation of anexemplary LCD according to another exemplary embodiment of the presentinvention.

DETAILED DESCRIPTION OF THE INVENTION

The present invention will be described more fully hereinafter withreference to the accompanying drawings, in which exemplary embodimentsof the present invention are shown. This invention may, however, beembodied in many different forms and should not be construed as limitedto the exemplary embodiments set forth herein.

In the drawings, the thickness of layers and regions are exaggerated forclarity. Like numerals refer to like elements throughout. It will beunderstood that when an element such as a layer, film, region,substrate, or panel is referred to as being “on” another element, it canbe directly on the other element or intervening elements may also bepresent. In contrast, when an element is referred to as being “directlyon” another element, there are no intervening elements present. As usedherein, the term “and/or” includes any and all combinations of one ormore of the associated listed items.

It will be understood that, although the terms first, second, third,etc., may be used herein to describe various elements, components,regions, layers, and/or sections, these elements, components, regions,layers, and/or sections should not be limited by these terms. Theseterms are only used to distinguish one element, component, region,layer, or section from another element, component, region, layer, orsection. Thus, a first element, component, region, layer, or sectiondiscussed below could be termed a second element, component, region,layer, or section without departing from the teachings of the presentinvention.

The terminology used herein is for the purpose of describing particularembodiments only and is not intended to be limiting of the invention. Asused herein, the singular forms “a”, “an”, and “the” are intended toinclude the plural forms as well, unless the context clearly indicatesotherwise. It will be further understood that the terms “comprises”and/or “comprising” or “includes” and/or “including” when used in thisspecification specify the presence of stated features, regions,integers, steps, operations, elements, and/or components, but do notpreclude the presence or addition of one or more other features,regions, integers, steps, operations, elements, components, and/orgroups thereof.

Spatially relative terms, such as “beneath”, “below”, “lower”, “above”,“upper”, and the like, may be used herein for ease of description todescribe one element or feature's relationship to another element(s) orfeature(s) as illustrated in the figures. It will be understood that thespatially relative terms are intended to encompass differentorientations of the device in use or operation in addition to theorientation depicted in the figures. For example, if the device in thefigures is turned over, elements described as “below” or “beneath” otherelements or features would then be oriented “above” the other elementsor features. Thus, the exemplary term “below” can encompass both anorientation of above and below. The device may be otherwise oriented(rotated 90 degrees or at other orientations) and the spatially relativedescriptors used herein may be interpreted accordingly.

Unless otherwise defined, all terms (including technical and scientificterms) used herein have the same meaning as commonly understood by oneof ordinary skill in the art to which this invention belongs. It will befurther understood that terms, such as those defined in commonly useddictionaries, should be interpreted as having a meaning that isconsistent with their meaning in the context of the relevant art and thepresent disclosure, and will not be interpreted in an idealized oroverly formal sense unless expressly so defined herein.

Embodiments of the present invention are described herein with referenceto cross-section illustrations that are schematic illustrations ofidealized embodiments of the present invention. As such, variations fromthe shapes of the illustrations as a result, for example, ofmanufacturing techniques and/or tolerances, are to be expected. Thus,embodiments of the present invention should not be construed as limitedto the particular shapes of regions illustrated herein but are toinclude deviations in shapes that result, for example, frommanufacturing. For example, a region illustrated or described as flatmay, typically, have rough and/or nonlinear features. Moreover, sharpangles that are illustrated may be rounded. Thus, the regionsillustrated in the figures are schematic in nature and their shapes arenot intended to illustrate the precise shape of a region and are notintended to limit the scope of the present invention.

An LCD according to exemplary embodiments of the present invention willnow be described with reference to FIGS. 1 through 5.

FIG. 1 is a block diagram of an exemplary LCD shown in view of pixelsaccording to an exemplary embodiment of the present invention. FIG. 2 isan equivalent circuit diagram of an exemplary pixel of an exemplary LCDaccording to an exemplary embodiment of the present invention. FIG. 3 isa block diagram of an exemplary LCD showing exemplary sensing unitsaccording to an exemplary embodiment of the present invention. FIGS. 4Aand 4B are equivalent circuit diagrams of sensing units of exemplaryLCDs according to exemplary embodiments of the present invention,respectively. Also, FIG. 5 is a schematic diagram of an exemplary LCDaccording to an exemplary embodiment of the present invention.

As shown in FIGS. 1 and 3, an exemplary LCD includes a liquid crystal(“LC”) panel assembly 300, an image scanning driver 400, an image datadriver 500, a sensing signal processor 800, a gray voltage generator 550coupled to the image data driver 500, a touch determiner 700 coupled tothe sensing signal processor 800, and a signal controller 600 forcontrolling the above-referenced elements as described further herein.

Referring to FIGS. 1 to 4B, the LC panel assembly 300, in an equivalentcircuital view, includes a plurality of signal lines G₁-G_(n) andD₁-D_(m), a plurality of pixels PX, a plurality of sensor signal linesSY₁-SY_(N), SX₁-SX_(M), and RL, and a plurality of sensing units SU. Thepixels PX are connected to the signal lines G₁-G_(n) and D₁-D_(m) andare arranged substantially in a matrix configuration. The sensing unitsSU are connected to the sensor signal lines SY₁-SY_(N), SX₁-SX_(M) andRL and are arranged substantially in a matrix configuration. The panelassembly 300, in a structural view shown in FIGS. 2 and 5, includes athin film transistor (“TFT”) array panel 100, a common electrode panel200, an LC layer 3 interposed therebetween, and a plurality of spacers(not shown). The spacers form a gap between the panels 100 and 200 andare transformed by pressure applied from the outside. A distance betweenthe panels 100 and 200 is defined as the cell gap.

The signal lines G₁-G_(n) and D₁-D_(m) include a plurality of imagescanning lines G₁-G_(n), also known as gate lines, for transmittingimage scanning signals and a plurality of image data lines D₁-D_(m),also known as source lines, for transmitting image data signals.

The sensor signal lines SY₁-SY_(N), SX₁-SX_(M) and RL include aplurality of horizontal and vertical sensor scanning lines SY₁-SY_(N)and SX₁-SX_(M), respectively, for transmitting sensor data signals and aplurality of reference voltage lines RL for transmitting referencevoltages. The reference voltage lines RL may be omitted if necessary.

As shown in FIGS. 1 and 3, the image scanning lines G₁-G_(n) and thehorizontal sensor data lines SY₁-SY_(N) extend substantially in a rowdirection, a first direction, and are substantially parallel to eachother, while the image data lines D₁-D_(m) and the vertical sensor datalines SX₁-SX_(M) extend substantially in a column direction, a seconddirection, and are substantially parallel to each other. The firstdirection and the second direction are substantially perpendicular toeach other. The reference voltage lines RL extend substantially in therow direction or in the column direction.

Referring to FIG. 2, each pixel PX, for example, a pixel PX in the i-throw (i=1, 2, . . . , n) and the j-th column (j=1, 2, . . . , m), isconnected to signal lines G_(i) and D_(j) and includes a switchingelement Q connected to the signal lines G₁-G_(n) and D₁-D_(m), and an LCcapacitor C_(LC) and a storage capacitor C_(ST) that are connected tothe switching element Q. However, it will be understood that the storagecapacitor C_(ST) may be omitted.

The switching element Q, such as a TFT, is provided on the lower panel100 and has three terminals: a control terminal, such as a gateelectrode, connected to one of the image scanning lines G₁-G_(n); aninput terminal, such as a source electrode, connected to one of theimage data lines D₁-D_(m); and an output terminal, such as a drainelectrode, connected to the LC capacitor C_(LC) and the storagecapacitor C_(ST). At this time, the TFT may be made of amorphous silicon(“a-Si”) or poly crystalline silicon.

The LC capacitor C_(LC) includes a pixel electrode 191 provided on theTFT array panel 100 and a common electrode 270 provided on the commonelectrode panel 200, as two terminals. The LC layer 3 disposed betweenthe two electrodes 191 and 270 functions as a dielectric of the LCcapacitor C_(LC). The pixel electrode 191 is connected to the switchingelement Q, and the common electrode 270 is supplied with a commonvoltage Vcom and covers an entire surface or substantially an entiresurface of the common electrode panel 200. While shown on the commonelectrode panel 200 in FIG. 2 for illustrative purposes, it will beunderstood that the common electrode 270 may alternatively be providedon the TFT array panel 100, and in which case both electrodes 191 and270 may have shapes comprising, e.g., bars or stripes.

The storage capacitor C_(ST) is an auxiliary capacitor for the LCcapacitor C_(LC). The storage capacitor C_(ST) includes the pixelelectrode 191 and a separate signal line (not shown) such as a storageelectrode line, which is provided on the lower panel 100, overlaps thepixel electrode 191 via an insulator (not shown), and is supplied with apredetermined voltage such as the common. voltage Vcom. In alternativeembodiments, the storage capacitor C_(ST) includes the pixel electrode191 and an adjacent image scanning line (one of G₁-G_(n)), called aprevious image scanning line, which overlaps the pixel electrode 191 viaan insulator.

For color display, each pixel PX uniquely represents one of variouscolors (i.e., spatial division) or each pixel PX sequentially representsthe colors (e.g., primary colors) in turn (i.e., temporal division) suchthat a spatial or temporal sum of the colors is recognized as a desiredcolor. An example of a set of the colors includes the colors of red,green, and blue. FIG. 2 shows an example of the spatial division inwhich each pixel PX includes a color filter 230 representing one of thecolors in an area of the common electrode panel 200 facing the pixelelectrode 191. In alternative exemplary embodiments, the color filter230 is provided on or under the pixel electrode 191 on the TFT arraypanel 100.

One or more polarizers (not shown) may be attached to at least one ofthe panels 100 and 200. A first polarized film and a second polarizedfilm may be disposed on the TFT array panel 100 and the common electrodepanel 200, respectively. The first and second polarized films adjust atransmission direction of light externally provided into the TFT arraypanel 100 and the common electrode panel 200, respectively, inaccordance with an aligned direction of the LC layer 3. The first andsecond polarized films have first and second polarized axes thereofsubstantially perpendicular to each other, respectively.

Each of the sensing units SU may have one of the structures shown inFIGS. 4A and 4B.

A sensing unit SU1 shown in FIG. 4A includes a variable capacitor Cvconnected to a horizontal or vertical sensor data line that isrepresented as a drawing reference “SL”, and a reference capacitor Cpconnected between the sensor data line SL and a reference voltage lineRL.

The reference capacitor Cp is formed between the reference voltage lineRL and the sensor data line SL, both of the TFT array panel 100, via aninsulator.

The variable capacitor Cv includes the sensor data line SL of the TFTarray panel 100 and the common electrode 270 provided on the commonelectrode panel 200 as two terminals and an LC layer 3 interposedtherebetween, which functions as an insulator. The capacitance of thevariable capacitor Cv varies by an external stimulus such as a touch ofa user, which is applied to the LC panel assembly 300. An example of theexternal stimulus is pressure, and when the pressure is applied to thecommon electrode panel 200, the distance between the two terminals ofthe variable capacitor Cv, by pressed-variation of the spacers, isaltered to vary the capacitance of the variable capacitor Cv.

By the variation of the capacitance of the variable capacitor Cv, atouch voltage Vn of a touch point between the reference capacitor Cp andthe variable capacitor Cv is varied.

The touch voltage Vn flows through the sensor data line SL as a sensordata signal, and whether touch is made or not is determined based on thetouch voltage Vn. At this time, since the reference capacitor Cp has apredetermined capacitance and the reference voltage from the referencevoltage line RL applied to the reference capacitor Cp is also fixed, thetouch voltage Vn is varied within a constant range. Thereby, the sensordata signal flowing through the sensor data line SL is varied within theconstant range, and whether touch is made, and, if so, a touch positionis easily determined.

A sensing unit SU2 shown in FIG. 4B includes a switch SWT connected tothe sensor data line SL. The switch SWT includes the common electrode270 of the common electrode panel 200 and the sensor data line SL of theTFT array panel 100 as two terminals. At least one of the two terminalsis projected, and thereby the two terminals are physically andelectrically connected to each other by touch of a user. Thereby, thecommon voltage Vcom from the common electrode panel 200 is outputted tothe sensor data line SL as a sensor data signal. When the sensing unitSU2 is applied, the reference voltage line RL shown in FIG. 4A may beomitted.

By analyzing the sensor data signals from the horizontal sensor datalines SY₁-SY_(N), a Y-coordinate of a touch point may be determined, andby analyzing the sensor data signals from the vertical sensor data linesSX₁-SX_(M), an X-coordinate of the touch point may be determined.

One sensing unit SU is disposed in two adjacent pixels PX. Aconcentration of a pair of the sensing units SU connected to thehorizontal and vertical sensor data lines SY₁-SY_(N) and SX₁-SX_(M),respectively, and disposed adjacent to an intersected area of thecorresponding sensor data lines SY₁-SY_(N) and SX₁-SX_(M), may be, forexample, about ¼ of the concentration of the “dots”, where the term“dot” includes a set of different colored pixels PX and is the basicunit for representing a color and determining the resolution of the LCD.The set of pixels PX may includes a red pixel, a green pixel, and a bluepixel sequentially arranged in a row. Alternatively, the set of pixelsPX may include a red pixel, a green pixel, a blue pixel, and a whitepixel.

As an example of the pair of the sensing units SU having about ¼concentration of the concentration of the dots, concentrations inhorizontal and vertical directions of the sensing units SU are abouthalf compared with concentration of horizontal and vertical directionsof the pixels PX, respectively. In this case, there may be pixel rowsand pixel columns without the sensing units SU.

An LCD having the concentration of sensing units SU and dots asabove-described may be utilized in various application fields requiringhigh letter recognition and accuracy. The concentration of sensing unitsSU may be varied if necessary. For example, the concentration of sensingunits SU may be more or less than the above-described ¼ concentration ofthe concentration of the dots.

By the sensing units SU according to an exemplary embodiment of thepresent invention, space occupied by the sensing units SU and the sensordata lines SL is relatively less as compared to pixels PX, and therebyan aperture decrement is minimized. That is, a decrease of the apertureratio of the LC panel assembly 300 is minimized.

Referring again to FIGS. 1 and 3, the gray voltage generator 550generates two sets of gray voltages (or reference gray voltages) relatedto a transmittance of the pixels PX. The gray voltages in the first sethave a positive polarity with respect to the common voltage Vcom, whilethe gray voltages in the second set have a negative polarity withrespect to the common voltage Vcom.

The image scanning driver 400 in FIG. 1 is connected to the imagescanning lines G₁-G_(n) of the panel assembly 300, and synthesizes afirst high voltage and a first low voltage to generate the imagescanning signals, such as a gate-on voltage Von and a gate-off voltageVoff, for application to the image scanning lines G₁-G_(n).

The image data driver 500 in FIG. 1 is connected to the image data linesD₁-D_(m) of the panel assembly 300 and applies image data signalsselected from the gray voltages to the image data lines D₁-D_(m).However, it will be understood that the image data driver 500 maygenerate gray voltages for both sets of gray voltages by dividing thereference gray voltages and selecting the data voltages from thegenerated gray voltages when the gray voltage generator 550 generatesreference gray voltages.

As shown in FIG. 3, the sensing signal processor 800 receives sensordata control signals CONT3 from the signal controller 600. The sensingsignal processor 800 is connected to the sensor data lines SY₁-SY_(N)and SX₁-SX_(M) of the LC panel assembly 300 and provided with the sensordata signals through the sensor data lines SY₁-SY_(N) and SX₁-SX_(M).After signal processing such as the amplifying and the filtering, etc.,the sensing signal processor 800 converts the analog processed sensordata signals into digital sensor data signals to generate digitalsensing signals DSN.

The touch determiner 700 is provided with the digital sensing signalsDSN from the sensing signal processor 800, processes predeterminedoperations to determine whether touch is made, and if so, a touchposition is output to an external device as touch information INF. Thetouch determiner 700 may sense operations of the sensing units SU basedon the digital sensing signals DSN and control control signals appliedto the sensing units SU.

The signal controller 600 controls the image scanning driver 400, theimage data driver 500, the gray voltage generator 550, and the sensingsignal processor 800, etc.

Referring to FIGS. 1 and 3, each of the aforementioned units 400, 500,550, 600, 700, and 800 may include at least one integrated circuit(“IC”) chip mounted on the LC panel assembly 300 or on a flexibleprinted circuit (“FPC”) film as a tape carrier package (“TCP”) type,which are attached to the panel assembly 300. In alternativeembodiments, at least one of the units 400, 500, 550, 600, 700, and 800may be integrated with the panel assembly 300 along with the signallines G₁-G_(n), D₁-D_(m), SY₁-SY_(N), and SX₁-SX_(M) and the switchingelements Q.

Referring to FIG. 5, the LC panel assembly 300 is divided into a displayarea P1, a periphery area P2, and an exposed area P3. Most of pixels PX,the sensing units SU, and signal lines G₁-G_(n), D₁-D_(m), SY₁-SY_(N),and SX₁-SX_(M) are mainly disposed in the display area P1. The commonelectrode panel 200 includes a black matrix (not shown), and the blackmatrix substantially covers the periphery area P2 to block light fromthe outside. A size of the common electrode panel 200 is less than thatof the TFT array panel 100 such that portions of the TFT array panel 100are exposed to form the exposed area P3. A single chip 610 is mountedonto the exposed area P3 and a flexible printed circuit board (“FPC”)substrate 620 is attached thereon.

The single chip 610 includes operating units, such as the image scanningdriver 400, the image data driver 500, the gray voltage generator 550,the signal controller 600, the touch determiner 700, and the sensingsignal processor 800. The units 400, 500, 550, 600, 700, and 800 may beintegrated into the single chip 610, to decrease the occupied size ofthe units 400, 500, 550, 600, 700, and 800 and consumption power. Ifnecessary, at least one of the units 400, 500, 550, 600, 700, 800, and900 or at least one circuit element of at least one of the units 400,500, 550, 600, 700, 800, and 900 may be disposed outside of the singleIC chip 610.

The image signal lines G₁-G_(n) and D₁-D_(m) and the sensor data linesSY₁-SY_(N) and SX₁-SX_(M) extend to the exposed area P3 and areconnected to the corresponding units 400, 500, and 800.

The FPC substrate 620 receives signals from an external device andtransmits the signals to the single chip 610 or LC panel assembly 300.The FPC substrate 620 may include connectors for easily touching to theexternal device at end portions thereof.

Operation of the LCD will now be described in accordance with exemplaryembodiments.

The signal controller 600 is supplied with input image signals R, G, andB and input control signals for controlling the display thereof from anexternal graphics controller (not shown). The input image signals R, G,and B contain luminance information of each pixel PX, and the luminancehas a predetermined number of grays, for example, 1024 (=2¹⁰), 256(=2⁸), or 64 (=2⁶). The input control signals include a verticalsynchronization signal Vsync, a horizontal synchronization signal Hsync,a main clock signal MCLK, a data enable signal DE, etc.

On the basis of the input control signals and the input image signals R,G, and B, the signal controller 600 generates image scanning controlsignals CONT1, image data control signals CONT2, and sensor data controlsignals CONT3, and it processes the image signals R, G, and B intoprocessed image signals DAT to be suitable for the operation of thepanel assembly 300. The signal controller 600 sends the image scanningcontrol signals CONT1 to the image scanning driver 400, the processedimage signals DAT and the image data control signals CONT2 to the imagedata driver 500, and the sensor data control signals CONT3 to thesensing signal processor 800.

The image scanning control signals CONT1 include an image scanning startsignal STV for instructing an image scanning start operation and atleast one clock signal for controlling the output time of the first highvoltage, such as Von which may be from a voltage generator (not shown).The image scanning control signals CONT1 may include an output enablesignal OE for defining the duration of the first high voltage.

The image data control signals CONT2 include a horizontalsynchronization start signal STH for informing a start of image datatransmission for a group of pixels PX, a load signal LOAD forinstructing application of the image data signals to the image datalines D₁-D_(m), and a data clock signal HCLK. The image data controlsignals CONT2 may further include an inversion signal RVS for reversingthe polarity of the image data signals (e.g., with respect to the commonvoltage Vcom).

Responsive to the image data control signals CONT2 from the signalcontroller 600, the image data driver 500 receives a packet of thedigital image data DAT for the group of pixels PX from the signalcontroller 600 and receives one of the two sets of the gray voltagessupplied from the gray voltage generator 550. The image data driver 500converts the processed image signals DAT into analog image data voltagesselected from the gray voltages supplied from the gray voltage generator550, and applies the image data voltages to the image data linesD₁-D_(m).

The image scanning driver 400 applies a gate-on voltage Von to the imagescanning lines G₁-G_(n) in response to receiving the image scanningcontrol signals CONT1 from the signal controller 600, thereby turning onthe switching elements Q connected thereto. The image data voltagesapplied to the image data lines D₁-D_(m) are supplied to the pixels PXthrough the activated switching elements Q. Gate-off voltage Voffapplied to the image scanning lines G₁-G_(n) via the image scanningdriver 400 turns off the switching elements Q connected thereto.

A difference between the voltage of an image data signal and the commonvoltage Vcom is represented as a voltage across the LC capacitor C_(LC),which is referred to as a pixel voltage. The LC molecules in the LCcapacitor C_(LC) have orientations depending on the magnitude of thepixel voltage, and the molecular orientations determine the polarizationof light passing through the LC layer 3. The polarizer(s) converts lightpolarization into light transmittance to display images.

By repeating this procedure by a unit of a horizontal period (alsoreferred to as “1H”, which is equal to one period of the horizontalsynchronization signal Hsync and the data enable signal DE), all imagescanning lines G₁-G_(n) are sequentially supplied with the first highvoltage, thereby applying the image data signals to all pixels PX viathe image data lines D₁-D_(m) to display an image for a frame.

When the next frame starts after one frame finishes, the inversioncontrol signal RVS applied to the image data driver 500 is controlledsuch that the polarity of the data voltages is reversed (which isreferred to herein as “frame inversion”). The inversion control signalRVS may also be controlled such that the polarity of the image datasignals flowing in an image data line is periodically reversed duringone frame (for example, row inversion and dot inversion), or thepolarity of the image data signals in one packet is reversed (forexample, column inversion and dot inversion).

The sensing signal processor 800 reads the sensor data signals, asprovided by touch voltages Vn, through the sensor data lines SY₁-SY_(N),and SX₁-SX_(M) in a porch period between two adjacent frames, inaccordance with the sensor data control signals CONT3 from the signalcontroller 600, every frame. This is to decrease the influence ofdriving signals from the image scanning driver 400 and the image datadriver 500, etc., on sensor data signals, such that reliability of thesensor data signals is increased. However, the reading of the sensordata signals by the sensing signal processor 800 is not necessarilyperformed every frame, and if necessary, it may be performed for aplurality of frames.

Then, as will be further described below, the sensing signal processor800 processes, for example, amplifies and filters, etc., the read sensordata signals from the sensor data lines SY₁-SY_(N), and SX₁-SX_(M) andconverts them into digital sensing signals DSN to output to the touchdeterminer 700.

The touch determiner 700 suitably operates the received digital sensingsignals DSN and determines whether a touch is made, and if so,determines a touch position to output the touch information INF to anexternal device. The external device transmits the image signals R, G,and B to an LCD based on the touch information INF from the touchdeterminer 700.

Next, exemplary operations of an LCD using the sensing unit SU1 shown inFIG. 4A according to an exemplary embodiment of the present inventionwill be described with reference to FIGS. 6A through 7B.

FIG. 6A is an equivalent circuit diagram of a plurality of exemplarysensing units connected to one exemplary sensor data line in anexemplary LCD according to an exemplary embodiment of the presentinvention, FIG. 6B is an equivalent circuit diagram simply representingthe equivalent circuit diagram shown FIG. 6A, and FIGS. 7A and 7B aretiming charts for an exemplary sensing operation of an exemplary LCDaccording to an exemplary embodiment of the present invention.

Referring to FIGS. 6A and 6B, an LC panel assembly 301 according to anexemplary embodiment of the present invention includes a plurality ofsensor data lines SL like those shown in FIG. 3, a plurality of sensingunits SU1 connected to the sensor data lines SL, respectively, aplurality of first and second reset transistors Qr1 and Qr2, a pluralityof output transistors Qs, and a plurality of output data lines OLconnected to the output transistors Qs. For each sensor data line SL, aplurality of sensing units SU1 are connected thereto, and each of thesensing units SU1 includes a variable capacitor Cv and a referencecapacitor Cp. Also for each sensor data line SL, one first resettransistor Qr1, one second reset transistor Qr2, and one outputtransistor Qs are connected to different end portions of the sensor dataline SL, respectively. The variable capacitors Cv are connected to thecommon voltage Vcom from the common electrode 270, and the referencecapacitors Cp are connected to a reference voltage Vp from the referencevoltage line RL. Meanwhile, the sensing signal processor 801 includes anamplifier AP, a capacitor Cf, and a switch SW.

As described above, the plurality of variable capacitors Cv includes thesensor data lines SL and the common electrode 270 as two terminals. Theplurality of variable capacitors Cv may be represented by one variablecapacitor Cv′ shown in FIG. 6B, and the capacitance of the variablecapacitor Cv′ is practically uniformly distributed along one sensor dataline SL. Moreover, as shown in FIG. 6B, the plurality of referencecapacitors Cp may be represented by one reference capacitor Cp′corresponding to the variable capacitor Cv′

The first and second reset transistors Qr1 and Qr2 have three terminals:control terminals connected to the first and second reset signals RST1and RST2, respectively, input terminals connected to the first andsecond reset voltages Vr1 and Vr2, respectively, and output terminalsconnected to a sensor data line SL. The first and second resettransistors Qr1 and Qr2 are disposed on the periphery area P2 of the LCpanel assembly 301 and supply the first and second reset voltages Vr1and Vr2 to the sensor data line SL in response to the first and secondreset signals RST1 and RST2. The first reset transistors Qr1 are locatedat first ends of the sensor data lines SL, and the second resettransistors Qr2 are located at second ends of the sensor data lines SL.

The output transistor Qs has three terminals: a control terminalconnected to the sensor data line SL, input terminals connected to aninput voltage Vs, and an output terminal connected to an output dataline OL. The output transistors Qs are also disposed on the peripheryarea P2 of the LC panel assembly 301, and they generate an output signalbased on the sensor data signal flowing through the sensor data line SL.The output signal may be a current, but alternatively, it may be avoltage.

The first reset transistor Qr1, the second reset transistor Qr2, and theoutput transistor Qs may be formed as TFTs on the TFT array panel 100within the same layers as the switching element Q, thus preventing anincrease in thickness of the LC panel assembly 301.

The output data line OL is connected to the amplifier AP of the sensingsignal processor 801.

The amplifier AP includes an inverting terminal (−), a non-invertingterminal (+), and an output terminal. The output data line OL isconnected to the inverting terminal (−), and the capacitor Cf and theswitch SW are connected between the inverting terminal (−) and theoutput terminal of the amplifier AP. A switching signal Vsw may beapplied to the switch SW, to discharge a charged voltage in thecapacitor Cf. A reference voltage Va is connected to the non-invertingterminal (+). The amplifier AP and the capacitor Cf function as acurrent integrator, to integrate output current from the outputtransistor Qs for a predetermined time and generate a sensing signal Vo.

Referring to FIG. 7A, an LCD according to an exemplary embodiment of thepresent invention reads sensing signals in the porch period between twoadjacent frames as described above, and in particular, preferably in afront porch period before the vertical synchronization signal Vsync.

The common voltage Vcom has a high level and a low level, and swingsbetween the high level and the low level by about 1H.

The first and second reset signals RST1 and RST2 have a gate-on voltageVon and a gate-off voltage Voff for turning on and turning off thetransistors RST1 and RST2, respectively. The gate-on voltage Von of thefirst reset signal RST1 is applied when the common voltage Vcom has ahigh level, and may be applied for about “1H”. When the gate-on voltageVon of the first reset signal RST1 is applied to the first resettransistor Qr1, the first reset voltage Vr1 is applied to the sensordata line SL to initialize the state of the sensor data line SL.

Then, when the first reset signal RST1 has the gate-off voltage Voff,the state of the sensor data line SL is floated, and thereby the sensordata signal is varied based on the capacitance variation of the variablecapacitor Cv′ and the variation of the common voltage Vcom. Meanwhile,after the state of the first reset signal RST1 is changed from thegate-on voltage Von into the gate-off voltage Voff, the switching signalVsw is applied to the switch SW, to discharge a charged voltage in thecapacitor Cf. Then, when a predetermine time lapses, the sensing signalprocessor 801 reads a sensing signal Vo. At this time, preferably, thesensing signal Vo is read within about “1H” after the state of the firstreset signal RST1 is changed into the gate-off voltage Voff. That is,preferably, the sensing signal Vo is read before the common voltage Vcomhas a high level again.

Since the sensor data signal is varied based on the first reset voltageVr1, the sensor data signal has a constant voltage range, and therebywhether touch is made, and if so, a touch position are easilydetermined.

After the sensing signal processor 801 reads the sensing signal Vo, thestate of the second reset signal RST2 is changed form the gate-offvoltage Voff into the gate-on voltage Von to turn on the second resettransistor Qr2. Thereby, the second reset voltage Vr2 is applied to thesensor data line SL, and thereby the state of the sensor data line SLbecomes the second reset voltage Vr2. The second reset voltage Vr2 ismaintained until the next first reset voltage Vr1 is applied to thesensor data line SL. The second reset voltage Vr2 and the common voltageVcom generate electric fields in an LC layer 3 between the sensor dataline SL and the common electrode 270. LC molecules of the LC layer 3have orientations (inclination directions) defined depending on thegenerated electric fields. The variation amount of the sensor datasignal is varied based on the orientations of the LC molecules, andthereby the variation amount of the sensor data signal increases byappropriately defining a value of the second reset voltage Vr2.

In an alternative embodiment, the gate-on voltage Von of the first resetsignal RST1 may be applied when the common voltage Vcom has a low level,at this time, and it is preferable that the sensing signal processor 801reads the sensing signal Vo before the common voltage Vcom has a lowlevel again. Also, the first reset signal RST1 may be synchronized withan image scanning signal applied to the final image scanning line Gn.

The second reset signal RST2 may have a gate-on voltage Von right nextto an approximate 1H or in any subsequent approximate 1H after thesensing signal Vo is read. For example, the gate-on voltage Von of thesecond reset signal RST2 may be applied when the common voltage Vcom hasa low level.

A timing diagram shown in FIG. 7B is substantially similar to the timingdiagram shown in FIG. 7A. However, referring to FIG. 7B, unlike FIG. 7A,the first reset signal RST1 has a gate-on voltage Von when the commonvoltage Vcom has a low level. That is, the first reset voltage Vr1 maybe applied when the common voltage Vcom has a low level. Moreover, thesensing signal processor 801 reads a sensing signal Vo within about 2Hafter the first reset signal RST1 has a gate-off voltage Voff. At thistime, the common voltage Vcom maintains a high level for about 2H suchthat the sensor data signal has a stable value. Thereby, the amplifierAP and the capacitor Cf charge an output current from the outputtransistor Qs for about 2H such that the variation width of the sensingsignal Vo increases.

Alternatively, the sensing signal processor 801 may read the sensingsignal Vo beyond about 2H after the first reset signal RST1 has agate-off voltage Voff. At this time, the level of the common voltageVcom may not be changed corresponding to the reading of the sensingsignal processor 801.

Connection relationships of the sensor data lines SL and the sensingsignal processor 801 of an LCD according to an exemplary embodiment ofthe present invention will be described with reference to FIG. 8.

FIG. 8 is an equivalent circuit diagram illustrating a connectionbetween the exemplary sensor data lines and an exemplary sensing signalprocessor of an exemplary LCD according to an exemplary embodiment ofthe present invention.

Referring to FIG. 8, the LC panel assembly 301 includes a plurality ofsensor data lines SY₁-SY_(N) and SX₁-SX_(M) and a plurality of sensingunits SU1. The LC panel assembly 301 further includes a plurality offirst and second reset transistors Qr1 and Qr2 and a plurality of outputtransistors Qs connected to the sensor data lines SY₁-SY_(N) andSX₁-SX_(M), respectively, and a plurality of horizontal and verticaloutput data lines OY₁-OY_(N) and OX₁-OX_(M) connected to the sensor datalines SY₁-SY_(N) and SX₁-SX_(M), respectively, through the correspondingoutput transistors Qs.

The sensing units SU1 are substantially equally disposed to the LC panelassembly 300 shown in FIG. 3. Moreover, the arrangement of the sensordata lines SY₁-SY_(N) and SX₁-SX_(M) connected to the sensing units SU1is substantially the same as that shown in FIG. 3. Furthermore,operations of the sensing signal processor 801 are substantially equalto those of the sensing signal processor 800 shown in FIG. 3. A displayarea P1, a periphery area P2, and an exposed area P3 of the LC panelassembly 301 are the same as those of the LC panel assembly 300 shown inFIG. 5. The sensing signal processor 801 is included in a single chipmounted on the exposed area of the LC panel assembly 301, such as singlechip 610 mounted in exposed area P3. The single chip further includes adata driver (not shown) as described above, and has terminal arrangementcorresponding to terminals of the sensing signal processor 801 and thedata driver.

Next, portions that are different from the LC panel assembly 300 shownin FIG. 3 will be further described.

Referring to FIG. 8, the first reset transistors Qr1 are disposed on theupper periphery area of the LC panel assembly 301, and the second resettransistors Qr2 and the output transistors Qs are disposed on the lowerperiphery area of the LC panel assembly 301. The first reset transistorsQr1 connected to the horizontal sensor data lines SY₁-SY_(N) aredisposed on the left periphery area, a first side, of the LC panelassembly 301, and the second reset transistor Qr2 and the outputtransistors Qs connected to the horizontal sensor data lines SY₁-SY_(N)are disposed on the right periphery area, a second side opposite to thefirst side, of the LC panel assembly 301. However, if necessary, thesecond reset transistors Qr2 may be disposed on the same area as thefirst reset transistors Qr1. Also, as illustrated, the first resettransistors Qr1 connected to the vertical sensor data lines SX₁-SX_(M)may be disposed on the top periphery area, a third side, of the LC panelassembly 301, and the second reset transistor Qr2 and the outputtransistors Qs connected to the vertical sensor data lines SX₁-SX_(M)may be disposed on the bottom periphery area, a fourth side opposite thethird side, of the LC panel assembly 301. That is, although the sizes ofthe output transistors Qs and the first and second reset transistors Qr1and Qr2 may be different from each other, the transistors Qs, Qr1, andQr2 are appropriately disposed on the periphery area P2 of the LC panelassembly 301 to minimize the size of the periphery area P2 of the LCpanel assembly 301.

The vertical output data lines OX₁-OX_(M) extend from the bottomperiphery area, the fourth side, to the exposed area P3 of the LC panelassembly 301 and are connected to the sensing signal processor 801, andthe horizontal output data lines OY₁-OY_(N) extend from the rightperiphery area, the second side, to the bottom periphery area, thefourth side, of the LC panel assembly 301 and are connected to thesensing signal processor 801 though the exposed area P3 of the LC panelassembly 301. Thus, the vertical output data lines OX₁-OX_(M) and thehorizontal output data lines OY₁-OY_(N) may extend substantiallyparallel to each other.

As described above, since a concentration of the pixels PX is differentfrom that of the sensing units SU1, the density of the image data linesD₁-D_(m) and the output data lines OY₁-OY_(N) and OX₁-OX_(M) aredifferent from each other. Each vertical output data line OX₁-OX_(M) isdisposed among the plurality of image data lines D₁-D_(m). Thehorizontal output data lines OY₁-OY_(N) are sequentially disposed on theright portion, the second side, of the LC panel assembly 301, but theimage data lines D₁-D_(m) are not disposed between the horizontal outputdata lines OY₁-OY_(N). When the horizontal output data lines OY₁-OY_(N)are disposed as described above, manufacturing processes of thehorizontal output data lines OY₁-OY_(N) become simple and currentdistortion from the output transistors Qs decreases. The single chip ofthe LC panel assembly 301 according to the exemplary embodiment of thepresent invention has a terminal arrangement corresponding to thearrangements of the image data lines D₁-D_(m) and the output data linesOY₁-OY_(N) and OX₁-OX_(M).

The positions of the data lines D₁-D_(m), OY₁-OY_(N), and OX₁-OX_(M) maybe varied, that is, the right and the left of the LC panel assembly 301may be exchanged with each other, and thereby the position of at leastone portion of the first and second reset transistors Qr1 and Qr2connected to the horizontal sensor data lines SY₁-SY_(N), the outputtransistors Qs, and the horizontal output data lines OY₁-OY_(N) may bechanged from the left to the right or from the right to the left.Similarly, the top and the bottom of the LC panel assembly 301 may beexchanged with each other.

Next, an LCD according to another exemplary embodiment of the presentinvention will be described with reference to FIGS. 9A to 10.

FIG. 9A is an equivalent circuit diagram of a plurality of exemplarysensing units connected to one exemplary sensor data line in anexemplary LCD according to another exemplary embodiment of the presentinvention, FIG. 9B is an equivalent circuit diagram simply representingthe equivalent circuit diagram shown FIG. 9A, and FIG. 10 is a timingchart for an exemplary sensing operation of an exemplary LCD accordingto another exemplary embodiment of the present invention.

An LC panel assembly 302 of an LCD according to an another exemplaryembodiment includes a plurality of sensor data lines SL, each sensordata line SL including a plurality of sensing units SU1 connectedthereto and each sensor data line SL further connected to a resettransistor Qr, an output transistor Qs, an output data line OL connectedto the output transistor Qs, and a current source transistor Qp. Eachsensing unit SU1 includes a variable capacitor Cv and a referencecapacitor Cp connected to the respective sensor data line SL, and areset transistor Qr and an output transistor Qs are connected to theopposite end terminals, respectively, of each sensor data line SL.Meanwhile, the sensing signal processor 802 includes amplifiers AP,capacitors Cf, and a switch SW.

The variable capacitors Cv and the reference capacitors Cp aresubstantially the same as those of the previous embodiment. Referring toFIG. 9B, the plurality of variable capacitors Cv are represented as onecapacitor Cv+ and the plurality of reference capacitors Cp arerepresented as one capacitor Cp′.

The reset transistor Qr is substantially the same as the first resettransistor Qr1 of the previous embodiment, and the output transistor Qsand the sensing signal processor 802 are substantially the same as thoseof the previous embodiment. Therefore, detailed descriptions thereof areomitted.

The current source transistor Qp, such as a TFT, includes threeterminals: a control terminal connected to a current control signal Vsk,an input terminal connected to an input voltage Vb, and an outputterminal connected to the output data line OL and an inverting terminal(−) of the amplifier AP. The current source transistors Qp are disposedon a periphery area P2 of the LC panel assembly 302.

A voltage of the inverting terminal (−) of the amplifier AP is the sameas that of the non-inverting terminal (+) of the amplifier AP such thata voltage from the output terminal of the current source transistor Qpis substantially the same as a reference voltage Va. When an inputvoltage Vb of the current source transistor Qp and the current controlsignal Vsk are defined to have a constant value in a predeterminedperiod, the current source transistor Qp applies a constant current forthe predetermined period. Thereby, the current source transistor Qpfunctions to subtract a constant amount from an output current from theoutput transistor Qs. Based on the subtracted output current, theamplifier AP and the capacitor Cf generate a sensing signal Vo. As themagnitude of an input signal Vs applied to the control terminal of theoutput transistor Qs becomes larger, the output current from the outputtransistor Qs increases, and thereby the variation amount of the outputcurrent in accordance with touch and non-touch increases. Accordingly,it is preferable to enlarge the reset voltage Vr.

When the output current increases without the current source transistorQp, an operating area of the amplifier AP increases, and thereby powerconsumption increases and the size of the amplifier AP increases.However, as described above, in the case that the constant currentamount is subtracted from the output current of the output transistor Qsby the current source transistor Qp, the operating area of the amplifierAP relatively decreases, and thereby the power consumption and the sizeof the amplifier AP significantly decrease. In this case, the variationof a current applied to the amplifier AP is substantially equal to thatof a current outputted from the output transistor Qs, so as to notinfluence a touch determination.

The timing diagram shown in FIG. 10 is similar to that shown in FIG. 7A.Referring to FIG. 10, sensing signals Vo are read in the porch period,and in particular, preferably in a front porch period before thevertical synchronization signal Vsync, as described above.

A gate-on voltage Von of a reset signal RST is applied to the resettransistor Qr when the common voltage Vcom is a high level. Byapplication of the gate-on voltage Von, a reset voltage Vr is applied tothe sensor data line SL, to initialize the sensor data line SL.

A current control signal Vsk has a high voltage to make the currentsource transistor Qp flow a constant current from input voltage Vb, anda low voltage to make the current source transistor Qp substantiallyblock the flow of the constant current. When a state of the reset signalRST is a gate-off voltage Voff, a switching signal Vsw is applied to theswitch SW, and a state of the current control signal Vsk is a highvoltage. Then, when a predetermined time lapses, the sensing signalprocessor 802 reads a sensing signal Vo, and then the state of thecurrent control signal Vsk is changed into a low voltage state. Sincethe current control signal Vsk maintains the high voltage in thepredetermined time, and thereby the constant current flows through thecurrent source transistor Qp, the power consumption decreases.

Various features of the LCD described with reference to FIGS. 6A to 8may be applied to the LCD shown in FIGS. 9A to 10. Alternatively, thecurrent source transistor Qp shown in FIG. 9A may be included in the LCpanel assembly 301 shown in FIG. 6A, and many features according to thecurrent source transistor Qp may be applied to the LCD described above.Also, the sensing unit SU2 as described with respect to FIG. 4B may beapplied to any of the above-described LCDs.

According to the present invention, an LC panel assembly includessensing units having variable capacitors or switches, etc., and therebywhether touch is made with the LC panel assembly, and if so, a touchposition are easily determined based on the pressure applied to the LCpanel assembly.

While the present invention has been described in detail with referenceto the exemplary embodiments, it is to be understood that the inventionis not limited to the disclosed embodiments, but, on the contrary, isintended to cover various modifications and equivalent arrangementsincluded within the spirit and scope of the appended claims.

1-27. (canceled)
 28. A liquid crystal display comprising: a first panel;a second panel facing and separated from the first panel; a liquidcrystal layer interposed between the first and second panels; aplurality of sensor data lines disposed on the second panel; a pluralityof variable capacitors of which capacitance thereof is varied bypressure, the variable capacitors connected to the sensor data lines; aplurality of reference capacitors connected to the sensor data lines;and first reset transistors and second reset transistors connected tothe sensor data lines and configured to supply a first reset voltage anda second reset voltage to the sensor data lines at different times inresponse to a first reset signal and a second reset signal,respectively.
 29. The liquid crystal display of claim 28, furthercomprising a plurality of output transistors connected to the sensordata lines and configured to generate output signals based on sensordata signals flowing through the sensor data lines.
 30. The liquidcrystal display of claim 29, further comprising a sensing signalprocessor supplied with the output signals from the output transistorsand generating sensing signals based on the output signals.
 31. Theliquid crystal display of claim 30, wherein the first reset signal andthe second reset signal comprise a gate-on voltage and a gate-offvoltage for turning on and turning off the first reset transistors andthe second reset transistors, respectively.
 32. The liquid crystaldisplay of claim 31, wherein the variable capacitors comprise firstcapacitance electrodes formed on the first panel and second capacitanceelectrodes formed on the second panel; the first capacitance electrodesare supplied with a common voltage; and the sensor data lines functionas the second capacitance electrodes.
 33. The liquid crystal display ofclaim 32, wherein the common voltage has a high level and a low level,and swings between the high level and the low level by about 1H.
 34. Theliquid crystal display of claim 33, wherein the gate-on voltage of thefirst reset signal is applied when the common voltage has a high level.35. The liquid crystal display of claim 34, wherein the gate-on voltageof the second reset signal is applied right next to an approximate 1H orin a subsequent approximate 1H after the sensing signal is read.
 36. Theliquid crystal display of claim 33, wherein the gate-on voltage of thefirst reset signal is applied when the common voltage has a low level.37. The liquid crystal display of claim 36, wherein the gate-on voltageof the second reset signal is applied right next to an approximate 1H orin a subsequent approximate 1H after the sensing signal is read.
 38. Theliquid crystal display of claim 33, wherein the sensing signal processorgenerates the sensing signals within a predetermined time after thefirst reset transistors are turned off.
 39. The liquid crystal displayof claim 38, wherein the common voltage maintains one of the high leveland the low level for the predetermined time.
 40. The liquid crystaldisplay of claim 39, wherein the predetermined time is at least about1H.
 41. The liquid crystal display of claim 30, wherein the first resettransistors apply the first reset voltage to the sensor data linesbefore the sensing signal processor generates the sensing signals. 42.The liquid crystal display of claim 41, wherein the second resettransistors apply the second reset voltage to the sensor data linesafter the sensing signal processor generates the sensing signals.
 43. Aliquid crystal display comprising: a first panel; a second panel facingand separated from the first panel; a liquid crystal layer interposedbetween the first and second panels; a plurality of sensor data linesformed on the second panel; a plurality of variable capacitors of whichcapacitance thereof is varied by pressure, the plurality of variablecapacitors connected to the sensor data lines; a plurality of referencecapacitors connected to the sensor data lines; a plurality of outputtransistors connected to the sensor data lines and generating outputsignals based on sensor data signals flowing through the sensor datalines; a plurality of current sources connected to the outputtransistors and flowing a constant current; and reset transistorsconnected to the sensor data lines and configured to supply a resetvoltage to the sensor data lines in response to a reset signal.
 44. Theliquid crystal display of claim 43, further comprising a sensing signalprocessor connected to the output transistors and the current sourcesand generating sensing signals based on the output signals and theconstant current.
 45. The liquid crystal display of claim 44, whereinthe reset signal comprises a gate-on voltage and a gate-off voltage forturning on and turning off the reset transistors.
 46. A liquid crystalpanel assembly comprising; the liquid crystal display of claim 1; andoperating units operating the liquid crystal display.
 47. The liquidcrystal panel assembly of claim 46, wherein the operating units are inat least one integrated circuit chip mounted on the liquid crystal panelassembly.
 48. The liquid crystal panel assembly of claim 47, wherein theliquid crystal panel assembly is divided into a display area, aperiphery area, and an exposed area; and the integrated circuit chipmounted onto the exposed area.
 49. The liquid crystal panel assembly ofclaim 46, wherein the operating units are integrated with the liquidcrystal panel assembly along with the sensor data lines, the first resettransistors, and the second reset transistors.